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 19-2911 Rev 2; 8/04
KIT ATION EVALU ILABLE AVA
EEPROM-Programmable TFT VCOM Calibrator
General Description
The MAX1512 is a programmable VCOM-adjustment solution for thin-film transistor (TFT) liquid-crystal displays (LCDs). The MAX1512 simplifies the labor-intensive VCOM-adjustment process and replaces mechanical potentiometers, which significantly reduces labor costs, increases reliability, and enables automation. The MAX1512 attaches to an external resistive voltagedivider and sinks a programmable current to set the VCOM voltage level. An internal 7-bit digital-to-analog converter (DAC) controls the sink current. The DAC is ratiometric relative to AVDD and is guaranteed to be monotonic over all operating conditions. This VCOM calibrator IC includes an EEPROM to store the desired VCOM voltage level. The EEPROM can be programmed repeatedly, giving TFT LCD manufacturers the flexibility to calibrate the display panel as many times as the manufacturing process requires. The IC features a single-wire interface between the LCD panel and the programming circuit. The singlewire interface delivers both programming power and DAC-adjustment commands to minimize changes to panel connectors and production equipment. The MAX1512 is available in an 8-pin 3mm x 3mm TDFN package. A complete evaluation kit is available to simplify evaluation and production development.
Features
7-Bit Adjustable Sink-Current Output Resistor-Adjustable Full-Scale Range Guaranteed Monotonic Output Over Operating Range Single-Wire Adjustment and Programming* EEPROM Stores VCOM Setting Interface Enable/Disable Control (CE) 2.6V to 3.6V Logic Supply-Voltage Operating Range (VDD) 4.5V to 20V Analog Supply-Voltage Range (VAVDD) VDD UVLO Protection 8-Pin 3mm x 3mm TDFN (0.8mm max)
MAX1512
Ordering Information
PART MAX1512ETA TEMP RANGE -40C to +85C PIN-PACKAGE 8 TDFN 3mm x 3mm
Applications
LCD Panels Notebook Computers Monitors LCD TVs
Typical Operating Circuit
VDD
Pin Configuration
AVDD VDD
TOP VIEW
OUT AVDD N.C. GND 1 2 3 4 8 SET CE CTL VDD
CE
AVDD R1
MAX1512
7 6 5
MAX1512
OUT VCOM R2
CTL GND
SET RSET
TDFN
*Patent Pending. ________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
EEPROM-Programmable TFT VCOM Calibrator MAX1512
ABSOLUTE MAXIMUM RATINGS
VDD, SET, CE to GND...............................................-0.3V to +4V OUT to GND ...........................................................-0.3V to +14V AVDD to GND.........................................................-0.3V to +24V CTL to GND ............................................................-0.3V to +16V Continuous Power Dissipation (TA = +70C) ............................... 8-Pin Thin QFN 3mm x 3mm (derate 24.4mW/C above +70C).............................................................1951mW Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +160C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, VDD = 3V, VAVDD = 10V, VOUT = 5V, RSET = 30.1k, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.) (Note 1)
PARAMETER SINK-CURRENT ADJUSTMENT SET Voltage Resolution SET Differential Nonlinearity SET Zero-Scale Error SET Full-Scale Error SET Current SET External Resistance (Note 2) VSET / VAVDD Voltage Ratio VSET / VAVDD Factory Set Voltage Ratio VDD SUPPLY VDD Supply Range VDD Supply Current VDD Power-On Reset Threshold VDD Power-On Reset Hysteresis CONTROL AND PROGRAMMING CE Input Low Voltage CE Input High Voltage CE Startup Time CTL High Voltage CTL Float Voltage CTL Low Voltage CTL Rejected Pulse Width CTL Minimum Pulse Width CTL Minimum Time Between Pulses CTL Input Current CTL = GND CTL = VDD -10 10 2.6V < VDD < 3.6V 2.6V < VDD < 3.6V (Note 3) 2.6V < VDD < 3.6V 2.6V < VDD < 3.6V 2.6V < VDD < 3.6V 0.70 x VDD 0.40 x VDD 0.20 x VDD 20 200 10 1.6 1 0.82 x VDD 0.62 x VDD 0.32 x VDD 0.4 V V ms V V V s s s A VDD IDD CE = VDD CE = GND Rising edge Falling edge 2.2 2.1 2.6 32 12 2.5 2.4 100 3.6 55 20 2.7 2.6 V A V mV ISET RSET To GND, VAVDD = 20V To GND, VAVDD = 4.5V DAC full scale 0.024 10 2.25 0.05 0.025 0.026 Guaranteed monotonic 7 -1 -1 -12 +1 +1 +2 +12 120 200 45.00 Bits LSB LSB LSB A k V/V V/V SYMBOL CONDITIONS MIN TYP MAX UNITS
2
_______________________________________________________________________________________
EEPROM-Programmable TFT VCOM Calibrator
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, VDD = 3V, VAVDD = 10V, VOUT = 5V, RSET = 30.1k, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.) (Note 1) CTL Input Current A CTL = VDD 10
PARAMETER CTL EEPROM Program Voltage OUTPUT VOLTAGE OUT Leakage Current OUT Settling Time VOUT Voltage Range AVDD SUPPLY VAVDD Supply Range VAVDD 4.5 20.0 V VOUT VDD = 2.1V To 0.5 LSB error band VSET + 0.5V 1 20 13 nA s V SYMBOL VPP (Note 3) CONDITIONS MIN 15.25 TYP 15.5 MAX 15.75 UNITS V
MAX1512
ELECTRICAL CHARACTERISTICS
(VDD = 3V, VAVDD = 10V, VOUT = 5V, RSET = 30.1k, TA = -40C to +85C, unless otherwise noted.) (Note 1)
PARAMETER SINK-CURRENT ADJUSTMENT SET Differential Nonlinearity SET Zero-Scale Error SET Full-Scale Error SET Current SET External Resistance (Note 2) VDD SUPPLY VDD Supply Range VDD Supply Current VDD Power-On Reset Threshold CONTROL AND PROGRAMMING CE Input Low Voltage CE Input High Voltage AVDD SUPPLY VAVDD Supply Range VAVDD 4.5 20.0 V AVDD Operating Current IAVDD VAVDD = 20V 20 A Note 1: Limits are 100% production tested at TA = +25C. Limits over the operating temperature range are guaranteed through correlation using standard quality control (SQC) methods. Note 2: SET external resistor range is verified at DAC full scale. Note 3: Guaranteed by design. Not production tested. 2.6V < VDD < 3.6V 2.6V < VDD < 3.6V 1.6 0.4 V V VDD IDD CE = VDD CE = GND Rising edge Falling edge 2.2 2.1 2.6 3.6 55 20 2.7 2.6 V A V ISET RSET To GND, VAVDD = 20V To GND, VAVDD = 4.5V 10 2.25 Guaranteed monotonic -1 -1 -12 +1 +2 +12 120 200 45.00 LSB LSB LSB A k SYMBOL CONDITIONS MIN TYP MAX UNITS
_______________________________________________________________________________________
3
EEPROM-Programmable TFT VCOM Calibrator MAX1512
Typical Operating Characteristics
(Circuit of Figure 1, VDD = 3V, VAVDD = 10V, VOUT = 5V, RSET = 24.9k, TA = +25C, DAC half scale, unless otherwise noted.)
VDD SUPPLY CURRENT vs. TEMPERATURE
MAX1512 toc01
VDD SUPPLY CURRENT vs. VDD
MAX1512 toc02
IOUT vs. RSET
VAVDD = 20V 1000
MAX1512 toc03
33.2 33.0 VDD SUPPLY CURRENT (A) 32.8 32.6 32.4 32.2 32.0 31.8 31.6 31.4 -40
40 CE = VDD 35 VDD SUPPLY CURRENT (A) 30 25 20 15
RISING FALLING
10,000
CE = VDD = 3V
IOUT (A)
100 VAVDD = 4.5V
10
10 5 0
1 VDD = VOUT = 3V 0.1 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 0.1 1 10 RSET (k) 100 1000 VDD (V)
-20
0
20
40
60
80
TEMPERATURE (C)
IOUT SINK-CURRENT ERROR vs. VDD
MAX1512 toc04
IOUT SINK-CURRENT ERROR vs. VAVDD
3.00 2.95 2.90 2.85 2.80 2.75 2.70
MAX1512 toc05
2.855 IOUT SINK-CURRENT ERROR (LSB) 2.850 2.845 2.840 2.835 2.830 2.825 2.820 2.6 2.8 3.0 3.2 3.4
3.05 IOUT SINK-CURRENT ERROR (LSB)
3.6
4.5
6.5
8.5 10.5 12.5 14.5 16.5 18.5 VAVDD (V)
VDD (V)
IOUT SINK-CURRENT ERROR vs. VOUT
MAX1512 toc06
IOUT SINK-CURRENT ERROR vs. TEMPERATURE
MAX1512 toc07
2.840 IOUT SINK-CURRENT ERROR (LSB)
3.0 IOUT SINK-CURRENT ERROR (LSB)
2.9
2.835
2.8
2.830 0 0.5 1.0 VOUT (V) 1.5 2.0
2.7 -40 -20 0 20 40 60 80 TEMPERATURE (C)
4
_______________________________________________________________________________________
EEPROM-Programmable TFT VCOM Calibrator MAX1512
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VDD = 3V, VAVDD = 10V, VOUT = 5V, RSET = 24.9k, TA = +25C, DAC half scale, unless otherwise noted.)
INTEGRAL NONLINEARITY vs. DAC SETTING
MAX1512 toc09 MAX1512 toc08
TOTAL UNADJUSTED ERROR vs. DAC SETTING
7 RSET = 25k TOTAL UNADJUSTED ERROR (LSB) 6 5 4 3 2 1 0 0 16 32 48 64 80 96 112 128 DAC SETTING RSET = 100k 1.0 0.8 INTEGRAL NON-LINEARITY (LSB) 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 0 16
DIFFERENTIAL NONLINEARITY vs. DAC SETTING
DIFFERENTIAL NON-LINEARITY (LSB) 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0
MAX1512 toc10
1.0
RSET = 100k
RSET = 25k
32
48
64
80
96
112 128
0
16
32
48
64
80
96
112 128
DAC SETTING
DAC SETTING
AVDD POWER-UP RESPONSE
MAX1512 toc11
VDD POWER-UP RESPONSE
VAVDD 10V/div 0 COUT = 100pF
MAX1512 toc12
COUT = 100pF
5V 4V
VOUT
VOUT 1V/div
10V VAVDD 0
0 VDD 2V/div 0 40s/div 40s/div
0
VDD 2V/div
SINGLE LSB STEP-UP RESPONSE
MAX1512 toc13
SINGLE LSB STEP-DOWN RESPONSE
MAX1512 toc14
COUT = 100pF
COUT = 100pF
VOUT 5mV/div VOUT 5mV/div
2V VCTL 0 40s/div 40s/div
2V VCTL 0
_______________________________________________________________________________________
5
EEPROM-Programmable TFT VCOM Calibrator MAX1512
Pin Description
PIN 1 2 3 4 5 NAME OUT AVDD N.C. GND VDD FUNCTION Adjustable Sink-Current Output. OUT connects to the resistive voltage-divider between AVDD and GND that sets the VCOM voltage. IOUT lowers the divider voltage by an adjustable amount. See the SET pin description. High-Voltage Analog Supply. Connects to the panel source-driver supply rail. No Connect. Not internally connected. Ground Supply Input. +2.6V to +3.6V input range. VCOM Adjustment and EEPROM Programming Control. CTL sets the internal DAC code and programs the EEPROM. A pulse-control method is used to adjust the VCOM level. See the VCOM Adjustment (CTL) section. To program the DAC setting into the EEPROM as the power-on default, drive CTL to the EEPROM programming voltage using the correct timing and voltage ramp rates. See the EEPROM Programming (CTL) section. Control Interface Enable. Connect CE to VDD to enable the CTL input. Connect CE to GND to disable the CTL input and reduce the supply current. Full-Scale Sink-Current Adjustment Input. Connect a resistor, RSET, from SET to GND to set the full-scale adjustable sink current. The full-scale adjustable sink current is equal to:
6
CTL
7
CE
8
SET
VAVDD 20 x R SET
IOUT is equal to the current through RSET.
Detailed Description
The MAX1512 is a solid-state alternative to mechanical potentiometers used for adjusting the LCD backplane voltage (VCOM) in TFT LCD displays. The MAX1512 attaches to an external resistive voltage-divider and sinks a programmable current (IOUT), which sets the VCOM level (Figure 1). An internal 7-bit DAC controls the sink current and allows the user to increase or decrease the VCOM level (Figure 2). The DAC is ratiometric relative to AVDD and is monotonic over all operating conditions. The user can store the DAC setting in an internal EEPROM. On power-up, the EEPROM presets the DAC to the last stored setting. The single-wire interface between the LCD panel and the programming circuit adjusts the DAC, programs the EEPROM, and provides programming power. The resistive voltage-divider and the AVDD supply set the maximum value of VCOM. The MAX1512 sinks current from the voltage-divider to reduce the VCOM level. The external resistor RSET sets the full-scale sink current and the minimum value of VCOM.
VDD 3V AVDD 10V VDD CE AVDD R1 200k MAX1512 OUT R2 245k SET GND RSET 25k VCOM 5V
CTL
Figure 1. Standard Application Circuit
6
_______________________________________________________________________________________
EEPROM-Programmable TFT VCOM Calibrator MAX1512
VDD AVDD VDD AVDD 19R CE CTL CTL CONTROL INTERFACE 7 R2 DAC R OUT VCOM
R1
SET EEPROM 7 RSET MAX1512 GND
Figure 2. Simplified Functional Diagram
Setting the VCOM Adjustment Range (RSET)
The external resistive voltage-divider sets the maximum value of the VCOM adjustment range. RSET sets the full-scale sink current, IOUT, which determines the minimum value of the VCOM adjustment range. Large RSET values increase resolution but decrease the VCOM adjustment range. Calculate R1, R2, and RSET using the following procedure: 1) Choose the maximum VCOM level (VMAX), the minimum VCOM level (V MIN), and the AVDD supply voltage (VAVDD). 2) Calculate the R1 / R2 ratio: R1 V AVDD - 1 R2 VMAX 3) Calculate the R1 / RSET ratio: R1 RSET
4) Choose RSET according to the limits shown in the Electrical Characteristics section and calculate the values for R1 and R2. 5) The resulting resolution is: Re solution =
(VMAX -VMIN )
127
A complete design example is given below: 1) VMAX = 5V, VMIN = 3V, VAVDD = 10V 2) 10 R1 - 1 =1 5 R2 R1 RSET = 20 x
3)
(5 - 3) = 8
5
(VMAX -VMIN )
VMAX
x 20
4) If R SET = 24.9k, then R1 = 200k and R2 = 200k 5) Resolution = 15.75mV
_______________________________________________________________________________________
7
EEPROM-Programmable TFT VCOM Calibrator MAX1512
MECHANICAL POTENTIOMETER AVDD MAX1512 EQUIVALENT CIRCUIT
Ra AVDD Rb VCOM MAX1512 Rc OUT SET R1 = Ra R2 = Rb + Rc Ra x (Rb + Rc) RSET = 20 x Rb RSET
AVDD
R1
R2
VCOM
Figure 3. Replacement of Mechanical/Potentiometer Circuit
MECHANICAL POTENTIOMETER AVDD
MAX1512 EQUIVALENT CIRCUIT
Rd AVDD Re VCOM MAX1512 Rf R1 = Rd R2 = Rf Rd x (Rd + Re + Rf) RSET = 20 x Re OUT SET RSET
AVDD
R1
R2
VCOM
Figure 4. Replacement of Mechanical/Potentiometer Circuit
Translating Existing Potentiometer Circuits
Existing VCOM adjustment circuits using conventional mechanical potentiometers can be translated into MAX1512 circuits. Figures 3 and 4 show two common adjustment circuits and their equivalent MAX1512 circuits.
Interface Enable/Disable (CE)
The MAX1512 control interface can be disabled to reduce the VDD supply current. Connect CE to GND to reduce the typical supply current from 32A to 12A. Connect CE to VDD to enable the control interface.
8
_______________________________________________________________________________________
EEPROM-Programmable TFT VCOM Calibrator
VDD
CE PROGRAMMING CIRCUIT RCE MAX1512
The programming circuit in Figure 5 drives CE high to enable the CTL input when it is connected. When the programming circuit is not connected, CE is pulled low through resistor RCE, which disables the CTL input. The CTL input is relatively immune to noise and brief voltage transients. It can be safely left continuously enabled if higher supply current is acceptable.
MAX1512
VCOM Adjustment (CTL)
CTL GND
Pulse CTL low for more than 200s to increment the DAC setting, which increases the OUT sink current and lowers the VCOM level by 1 least-significant bit (LSB) (Figure 6). Similarly, pulse CTL high for more than 200s to decrement the DAC setting, which decreases the OUT sink current and increases the VCOM level by 1 LSB.
Figure 5. Optional Circuit to Drive CE
>1ms
>200s
>200s
>200s >10s >200s
<20s
<20s
CTL HIGH VCOM UP CTL VDD/2 FIRST COUNT IGNORED SHORT COUNTS IGNORED VCOM DOWN
CTL LOW
CE / VDD
CTL ENABLED
DAC SETTING
UNDEFINED
64
65
64
63
VCOM
Figure 6. VCOM Adjustment _______________________________________________________________________________________ 9
EEPROM-Programmable TFT VCOM Calibrator MAX1512
To avoid unintentional VCOM adjustment, the MAX1512 is guaranteed to reject CTL pulses shorter than 20s. In addition, to avoid the possibility of a single false pulse caused by power-up sequencing between V DD and CTL, the very first pulse is ignored.
EEPROM Programming (CTL)
To program the EEPROM, apply the EEPROM programming waveform through the CTL interface (Figure 7). The control interface delivers programming power and DAC adjustment commands on the same wire. This 1-wire approach minimizes the number of connections from the programming circuit to the LCD panel. To apply the EEPROM programming waveform, carefully ramp CTL from midscale (VDD / 2) to the programming voltage, VPP, in 7.5ms as shown in Figure 7. If the ramp is generated digitally, use at least 45 steps to achieve the required 320mV ramp resolution. During the ramp time, VCOM adjustment is disabled and the EEPROM cells are biased in preparation for programming. After reaching V PP , hold CTL at V PP for 1ms. During the EFPROM program time, the EEPROM stores the DAC setting. Next, drive CTL to ground in less than 1ms and hold for at least 200s. Finally, drive CTL to VDD / 2 to complete the write cycle. The EEPROM is factory set to half scale. Follow the EEPROM Programming Specifications in Table 1 to guarantee reliable EEPROM programming. Violating the specifications can damage the EEPROM or affect data retention. A complete evaluation kit is available to simplify evaluation and production development.
CTL VOLTAGE VPP
VDD / 2 0 T1 T2 T3 T4
TIME
Figure 7. EEPROM Programming
Table 1. EEPROM Programming Specifications
PARAMETER CTL Programming Voltage CTL Programming Ramp EEPROM Program Time VPP Fall Time Done Hold Time SYMBOL VPP T1 T2 T3 T4 MIN 15.25 7.0 0.9 10 200 TYP 15.5 7.5 1.0 MAX 15.75 8.0 1.1 1000 UNITS V ms ms s s
10
______________________________________________________________________________________
EEPROM-Programmable TFT VCOM Calibrator
Applications Information
The VCOM adjustment and the EEPROM programming must be performed with an external programming circuit. Refer to the MAX1512 evaluation kit for a complete programming circuit solution. Use a circuit similar to the conceptual diagram shown in Figure 8 to drive CTL. The accuracy of the programming voltage (VPP) is critical for proper MAX1512 data retention. The use of a comparator is recommended to verify the correct programming voltage has been reached. A complete design example of a CTL programming circuit is presented in the MAX1512 evaluation kit data sheet.
Leakage Current (CTL)
The CTL pin is internally biased to VDD / 2, but it is sensitive to leakage currents above 0.1A. When CTL is not driven, avoid leakage currents around the CTL pin. Otherwise, reinforce the VDD / 2 set point with an external resistive voltage-divider.
MAX1512
Layout Information
Use the following guidelines for good layout: * Place the VCOM buffer and the R1/R2 voltagedivider close to the OUT pin (Figure 1). Keep the VCOM buffer and the R1/R2 voltage-divider close to each other. Place RSET close to SET. In noisy environments, bypass capacitors may be desired on VDD and/or VAVDD. Keep any bypass capacitors close to the IC with short connections to the pins. Refer to the MAX1512 evaluation kit for an example of proper board layout. * *
Electrostatic Discharge (CTL)
The CTL pin is exposed at the LCD panel connector and is subject to electrostatic discharge (ESD). Often an RC filter is used to improve an input's resilience to ESD. If a filter is added between the LCD panel connector and CTL, ensure that the RC time constant is short enough to avoid interfering with CTL pulses or the EEPROM programming timing. An RC time constant less than 200s does not interfere with EEPROM programming.
USER INTERFACE
C
DAC 0 TO 2.5V
0 TO 15.5V CTL
MAX1512
REF
VPP VERIFY
Figure 8. Conceptual Programming Circuit
______________________________________________________________________________________
11
EEPROM-Programmable TFT VCOM Calibrator MAX1512
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
6, 8, &10L, DFN THIN.EPS
C L
D
N
PIN 1 INDEX AREA
E
DETAIL A
E2
C L
L A e e
L
PACKAGE OUTLINE, 6, 8, 10 & 14L, TDFN, EXPOSED PAD, 3x3x0.80 mm
NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY
21-0137
F
1
2
COMMON DIMENSIONS SYMBOL A D E A1 L k A2 MIN. 0.70 2.90 2.90 0.00 MAX. 0.80 3.10 3.10 0.05
0.40 0.20 0.25 MIN. 0.20 REF.
PACKAGE VARIATIONS PKG. CODE T633-1 T833-1 T1033-1 T1433-1 T1433-2 N 6 8 10 14 14 D2 1.500.10 1.500.10 1.500.10 1.700.10 1.700.10 E2 2.300.10 2.300.10 2.300.10 2.300.10 2.300.10 e 0.95 BSC 0.65 BSC 0.50 BSC 0.40 BSC 0.40 BSC JEDEC SPEC MO229 / WEEA MO229 / WEEC MO229 / WEED-3 ------b 0.400.05 0.300.05 0.250.05 0.200.03 0.200.03 [(N/2)-1] x e 1.90 REF 1.95 REF 2.00 REF 2.40 REF 2.40 REF
PACKAGE OUTLINE, 6, 8, 10 & 14L, TDFN, EXPOSED PAD, 3x3x0.80 mm
21-0137
F
2
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.


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